As improved fabrication techniques allow greater and greater circuit density within electronic devices, functionality previously distributed over several chips migrated onto a single chip. Microprocessors, for example, now perform functions previously found on co-processors and peripheral controllers in addition to the more traditional processing role. However, migrating several functions onto a single chip hinders an end user's ability to upgrade peripheral functions that have migrated onto the processor. For example, if a graphics controller or other peripheral controller is implemented integrally with a processor, the end user may have difficulty upgrading the graphics controller without having to purchase a new microprocessor or computer system.
The migration of functionality onto a single chip therefore can lock the end user into a single configuration. When a chip set implements peripheral controllers on the same chip as the processors, it can be difficult for an end user to disable on-chip peripheral controllers to upgrade as new peripheral controllers become available. One of the new chip sets includes an integrated bus bridge and graphics controller. Migrating the bus bridge and graphics controller onto a single chip allows much more efficient reuse as well as the elimination of redundant circuitry, as well as reducing cost. The internal graphics controller can quickly access main memory via the on-chip bus bridge. However, the new chip set does not forego expandability. As new graphics controllers become available, the end user can insert expansion cards containing upgrade graphics controllers into expansion slots within the computer system. A graphics controller implemented on an expansion card is coupled to the bus bridge via a bus, typically either an accelerated graphics port (AGP) bus or peripheral component interconnect (PCI) bus. Both of these bus types are source terminated, in that they rely on a reflected wave to be absorbed by the output impedance of the signal driver. The output impedance of the driver equals the line impedance.
However, the presence of an expansion slot coupled to the expansion bus presents problems for the on-chip graphics controller when no expansion graphics controller is inserted into the expansion slot. For example, when the bus bridge provides a signal for the on-chip graphics controller, echoes or signal reflections from the expansion slot can interfere with the on-chip graphics controller's reception of the signal. Because the bus bridge and on-chip graphics controller are implemented on the same chip, signals propagate from the bus bridge to the on-chip graphics controller, by going all the way down the bus to the expansion slot and then are reflected back before the on chip graphics controller sees the full magnitude of the signal. The elapsed time is twice as long as the signal takes to get to the graphics controller in the expansion slot. Since the bus specifications are defined to the device farthest away from the bus bridge, either the bus has to be half the length defined by the specification, or the bus has to be non-compliant with the specifications.
In many respects, the expansion bus terminating in the empty expansion slot operates as a transmission line. Source terminated busses operate with the impedance of the output buffer, approximately equal to the ended transmission line impedance. The bus bridge applies a voltage to the expansion bus, implementing a signal that propagates down the expansion bus and is then reflected back towards the bus bridge. Because the impedance at the expansion slot is infinite, the reflection coefficient is one. Therefore, the reflected signal reinforces the propagating signal and produces a voltage double the applied voltage. The on-chip graphics controller, therefore, receives a first voltage directly from the on-chip bus bridge, and later receives a reflection signal to bring it up to the full magnitude. Operating at high speeds, the interface between the bus bridge and the on-chip graphics controller suffers excessive delay caused by driving the signal out to the expansion slot and back again to get to the on-chip graphics controller.
Therefore, a need has arisen for a configurable bus interface coupling an internal bus bridge, an internal circuit such as an on-chip graphics controller and an external circuit such as an expansion slot configured to receive an expansion or upgrade graphics controller.